a) Field of the Invention
The invention relates to a structure combining an IC integrated substrate and a carrier, and a method of manufacturing such structure.
b) Description of the Related Art
As information, communication, and consumer electronic products are moving in the trend of becoming lightweight, thin, short, compact, and multifunctional, the line width, line spacing, and size of chips are getting smaller and the chips require faster transmission speed. In response thereto, better packaging technology for electrically connecting the chips to the exterior is required to increase the wiring density. Therefore, the chip packaging technology transformed from through hole type to surface mount type, the lead frame went from connecting by gold wire to using bumps, and circuit boards started out from hard printed circuit boards (PCB) to flexible printed circuit boards (FPCB) and to multilayer thin-film substrates.
A typical six-layer PCB with BT material weighs about 4 grams and has a thickness of about 1 mm, and thus cannot be bent. An FPCB with a thickness of about 50 μm can only be made with two layers of interconnection. In contrast, a multilayer thin-film substrate with a thickness of about 50 μm can have six layers of interconnection and weighs about 0.21 grams in total, and therefore the multilayer thin-film substrate has the best flexibility and is the most compact. Moreover, in regard to the interconnection density, for PCB and FPCB, the minimum diameter of through holes is 50 μm, the minimum dimension of through hole bonding pads is 100 μm, and the minimum line width and line spacing is 25 μm, whereas for the multilayer thin-film substrate, the minimum diameter of through holes is 20 μm, the minimum dimension of through hole bonding pads is 25 μm, and the minimum line width and line spacing is 20 μm, and therefore the multilayer thin-film substrate greatly increases the interconnection density. The multilayer thin-film substrate, due to its flexibility, is especially suitable for products that have special limitation in size or have a structure with bending design.
In general, the aforementioned multilayer thin-film substrate is used as an IC packaging substrate, playing a conventional role of electrical signal transmission and interface connection. With requirements of the electronic products heading towards high functionality, high speed signal transmission, and high density circuitries, the multilayer thin-film substrate technology has a larger room for growth because the multilayer thin-film substrate has semiconductor devices with functionalities like capacitance and resistance, and thereby can greatly enhance its functionality. The semiconductor device is, for example, passive devices, driver ICs, and thin film transistors (TFT). This type of high functionality multilayer thin-film substrate is referred to as IC integrated substrate hereafter.
In photoelectric, electronic, and semiconductor industries, as the IC integrated substrate miniaturizes in size while it provides more and more functions, the level of precision required of the IC integrated substrate also rises. The manufacturing process of IC integrated substrate thus faces new challenges, especially in how to increase circuit density and/or how to combine different electronic devices to form a high functionality IC integrated substrate, both of which are important parts of industrial competitions. A key to manufacturing an IC integrated substrate is the size stability of the IC integrated substrate in the manufacturing process. A conventional solution is to manufacture the IC integrated substrate on a rigid carrier; in which the size stability of the carrier is used to increase the size stability of the IC integrate substrate during processing. However, a major issue in using this solution is the separation of the IC integrated substrate from the carrier after the fabrication of the IC integrated substrate is complete.
In U.S. Pat. No. 4,480,288, a double-sided thin, flexible circuitry is formed on an aluminum carrier, and then the aluminum carrier is removed by hydrochloric acid. In addition, U.S. Pat. No. 4,812,191 discloses a method of manufacturing a multilayer thin-film substrate comprising a multilayer interconnection structure by using a sacrificial substrate technique. In the method, a multilayer interconnection structure is formed on a carrier that has a coefficient of thermal expansion less than that of the structure, and then the temperature is elevated to perform curing, after which the temperature is lowered to generate sufficient tension between the carrier and the multilayer interconnection structure before the multilayer interconnection structure is separated from the carrier by adhering a support means to the multi-layer interconnection structure and by an acid-etching process.
U.S. Pat. No. 5,258,236 is about a method of separating a carrier and a multilayer thin-film substrate having a multilayer interconnection structure by laser ablation. Referring to FIG. 1, a polymer layer 2, a metal layer 3, and a multilayer interconnection structure 4 are sequentially formed on the transparent carrier 1. Ultraviolet light is then applied to the polymer layer 2 through the transparent carrier 1 in order to ablate the polymer 2, allowing the transparent carrier 1 to be separated from the rest of the structure.
However, the aforementioned separation methods are tedious and complex. Thus, a manufacturing method that fabricates an IC integrated substrate with high size-precision and separates the IC integrated substrate and a carrier without increasing the production cost is much needed.